mmRLC_DYN_PG_STATUS_BASE_IDX 9367 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmRLC_DYN_PG_STATUS_BASE_IDX                                                                   1
mmRLC_DYN_PG_STATUS_BASE_IDX 6023 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmRLC_DYN_PG_STATUS_BASE_IDX                                                                   1
mmRLC_DYN_PG_STATUS_BASE_IDX 6267 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmRLC_DYN_PG_STATUS_BASE_IDX                                                                   1
mmRLC_DYN_PG_STATUS_BASE_IDX 6243 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmRLC_DYN_PG_STATUS_BASE_IDX                                                                   1