mmRLC_CNTL 9268 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmRLC_CNTL 0x4c00 mmRLC_CNTL 5936 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmRLC_CNTL 0x4c00 mmRLC_CNTL 6180 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmRLC_CNTL 0x4c00 mmRLC_CNTL 6144 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmRLC_CNTL 0x4c00 mmRLC_CNTL 1136 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_d.h #define mmRLC_CNTL 0x30C0 mmRLC_CNTL 1240 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_0_d.h #define mmRLC_CNTL 0x30c0 mmRLC_CNTL 1253 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_d.h #define mmRLC_CNTL 0x30c0 mmRLC_CNTL 1342 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h #define mmRLC_CNTL 0xec00 mmRLC_CNTL 1345 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h #define mmRLC_CNTL 0xec00