mmRESPONSE_INTERRUPT_COUNT_BASE_IDX 16757 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmRESPONSE_INTERRUPT_COUNT_BASE_IDX                                                            0
mmRESPONSE_INTERRUPT_COUNT_BASE_IDX  153 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmRESPONSE_INTERRUPT_COUNT_BASE_IDX                                                            0
mmRESPONSE_INTERRUPT_COUNT_BASE_IDX 16061 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmRESPONSE_INTERRUPT_COUNT_BASE_IDX                                                            0