BIF_CFG_DEV0_EPF0_VF5_1_STATUS__CAP_LIST_MASK 102275 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_2_3_sh_mask.h #define BIF_CFG_DEV0_EPF0_VF5_1_STATUS__CAP_LIST_MASK                                                         0x0010L
BIF_CFG_DEV0_EPF0_VF5_1_STATUS__CAP_LIST_MASK 30026 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_6_1_sh_mask.h #define BIF_CFG_DEV0_EPF0_VF5_1_STATUS__CAP_LIST_MASK                                                         0x0010L