mmPLL_MACRO_CNTL_RESERVED24_BASE_IDX  175 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmPLL_MACRO_CNTL_RESERVED24_BASE_IDX                                                           2
mmPLL_MACRO_CNTL_RESERVED24_BASE_IDX  773 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmPLL_MACRO_CNTL_RESERVED24_BASE_IDX                                                           2
mmPLL_MACRO_CNTL_RESERVED24_BASE_IDX  425 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmPLL_MACRO_CNTL_RESERVED24_BASE_IDX                                                           2
mmPLL_MACRO_CNTL_RESERVED24_BASE_IDX  415 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmPLL_MACRO_CNTL_RESERVED24_BASE_IDX                                                           2