mmPHYPLLG_PIXCLK_RESYNC_CNTL_BASE_IDX  707 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h #define mmPHYPLLG_PIXCLK_RESYNC_CNTL_BASE_IDX                                                          1
mmPHYPLLG_PIXCLK_RESYNC_CNTL_BASE_IDX  515 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmPHYPLLG_PIXCLK_RESYNC_CNTL_BASE_IDX                                                          1