mmPCTL0_STCTRL_REGISTER_SAVE_RANGE4_BASE_IDX  887 drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_2_0_0_offset.h #define mmPCTL0_STCTRL_REGISTER_SAVE_RANGE4_BASE_IDX                                                   0
mmPCTL0_STCTRL_REGISTER_SAVE_RANGE4_BASE_IDX 1159 drivers/gpu/drm/amd/include/asic_reg/mmhub/mmhub_9_3_0_offset.h #define mmPCTL0_STCTRL_REGISTER_SAVE_RANGE4_BASE_IDX                                                   0