mmPA_SU_VTX_CNTL_BASE_IDX 6607 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmPA_SU_VTX_CNTL_BASE_IDX                                                                      1
mmPA_SU_VTX_CNTL_BASE_IDX 4205 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmPA_SU_VTX_CNTL_BASE_IDX                                                                      1
mmPA_SU_VTX_CNTL_BASE_IDX 4457 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmPA_SU_VTX_CNTL_BASE_IDX                                                                      1
mmPA_SU_VTX_CNTL_BASE_IDX 4413 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmPA_SU_VTX_CNTL_BASE_IDX                                                                      1