mmPA_SU_VTX_CNTL 6606 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmPA_SU_VTX_CNTL                                                                               0x02f9
mmPA_SU_VTX_CNTL 4204 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmPA_SU_VTX_CNTL                                                                               0x02f9
mmPA_SU_VTX_CNTL 4456 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmPA_SU_VTX_CNTL                                                                               0x02f9
mmPA_SU_VTX_CNTL 4412 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmPA_SU_VTX_CNTL                                                                               0x02f9
mmPA_SU_VTX_CNTL 1103 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_d.h #define mmPA_SU_VTX_CNTL 0xA2F9
mmPA_SU_VTX_CNTL  954 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_0_d.h #define mmPA_SU_VTX_CNTL                                                        0xa2f9
mmPA_SU_VTX_CNTL  967 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_d.h #define mmPA_SU_VTX_CNTL                                                        0xa2f9
mmPA_SU_VTX_CNTL 1049 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h #define mmPA_SU_VTX_CNTL                                                        0xa2f9
mmPA_SU_VTX_CNTL 1049 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h #define mmPA_SU_VTX_CNTL                                                        0xa2f9