mmPA_SU_PRIM_FILTER_CNTL_BASE_IDX 6411 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmPA_SU_PRIM_FILTER_CNTL_BASE_IDX                                                              1
mmPA_SU_PRIM_FILTER_CNTL_BASE_IDX 4017 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmPA_SU_PRIM_FILTER_CNTL_BASE_IDX                                                              1
mmPA_SU_PRIM_FILTER_CNTL_BASE_IDX 4269 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmPA_SU_PRIM_FILTER_CNTL_BASE_IDX                                                              1
mmPA_SU_PRIM_FILTER_CNTL_BASE_IDX 4221 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmPA_SU_PRIM_FILTER_CNTL_BASE_IDX                                                              1