mmPA_SC_TRAP_SCREEN_HV_LOCK_BASE_IDX 2369 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmPA_SC_TRAP_SCREEN_HV_LOCK_BASE_IDX                                                           0
mmPA_SC_TRAP_SCREEN_HV_LOCK_BASE_IDX  343 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmPA_SC_TRAP_SCREEN_HV_LOCK_BASE_IDX                                                           0
mmPA_SC_TRAP_SCREEN_HV_LOCK_BASE_IDX  337 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmPA_SC_TRAP_SCREEN_HV_LOCK_BASE_IDX                                                           0
mmPA_SC_TRAP_SCREEN_HV_LOCK_BASE_IDX  331 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmPA_SC_TRAP_SCREEN_HV_LOCK_BASE_IDX                                                           0