mmPA_SC_ENHANCE_BASE_IDX 2413 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmPA_SC_ENHANCE_BASE_IDX                                                                       0
mmPA_SC_ENHANCE_BASE_IDX  377 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmPA_SC_ENHANCE_BASE_IDX                                                                       0
mmPA_SC_ENHANCE_BASE_IDX  371 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmPA_SC_ENHANCE_BASE_IDX                                                                       0
mmPA_SC_ENHANCE_BASE_IDX  367 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmPA_SC_ENHANCE_BASE_IDX                                                                       0