mmPA_SC_BINNER_CNTL_0_BASE_IDX 6655 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmPA_SC_BINNER_CNTL_0_BASE_IDX                                                                 1
mmPA_SC_BINNER_CNTL_0_BASE_IDX 4253 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmPA_SC_BINNER_CNTL_0_BASE_IDX                                                                 1
mmPA_SC_BINNER_CNTL_0_BASE_IDX 4505 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmPA_SC_BINNER_CNTL_0_BASE_IDX                                                                 1
mmPA_SC_BINNER_CNTL_0_BASE_IDX 4461 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmPA_SC_BINNER_CNTL_0_BASE_IDX                                                                 1