mmPA_CL_VTE_CNTL 6400 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmPA_CL_VTE_CNTL                                                                               0x0206
mmPA_CL_VTE_CNTL 4006 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmPA_CL_VTE_CNTL                                                                               0x0206
mmPA_CL_VTE_CNTL 4258 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmPA_CL_VTE_CNTL                                                                               0x0206
mmPA_CL_VTE_CNTL 4210 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmPA_CL_VTE_CNTL                                                                               0x0206
mmPA_CL_VTE_CNTL  933 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_6_0_d.h #define mmPA_CL_VTE_CNTL 0xA206
mmPA_CL_VTE_CNTL  916 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_0_d.h #define mmPA_CL_VTE_CNTL                                                        0xa206
mmPA_CL_VTE_CNTL  929 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_7_2_d.h #define mmPA_CL_VTE_CNTL                                                        0xa206
mmPA_CL_VTE_CNTL 1011 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h #define mmPA_CL_VTE_CNTL                                                        0xa206
mmPA_CL_VTE_CNTL 1011 drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_1_d.h #define mmPA_CL_VTE_CNTL                                                        0xa206