mmPA_CL_UCP_0_X_BASE_IDX 6191 drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h #define mmPA_CL_UCP_0_X_BASE_IDX                                                                       1
mmPA_CL_UCP_0_X_BASE_IDX 3787 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h #define mmPA_CL_UCP_0_X_BASE_IDX                                                                       1
mmPA_CL_UCP_0_X_BASE_IDX 4039 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h #define mmPA_CL_UCP_0_X_BASE_IDX                                                                       1
mmPA_CL_UCP_0_X_BASE_IDX 3989 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h #define mmPA_CL_UCP_0_X_BASE_IDX                                                                       1