mmOTG5_OTG_V_BLANK_START_END_BASE_IDX 7388 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmOTG5_OTG_V_BLANK_START_END_BASE_IDX                                                          2
mmOTG5_OTG_V_BLANK_START_END_BASE_IDX 10057 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmOTG5_OTG_V_BLANK_START_END_BASE_IDX                                                          2
mmOTG5_OTG_V_BLANK_START_END_BASE_IDX 9027 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmOTG5_OTG_V_BLANK_START_END_BASE_IDX                                                          2