mmOTG5_OTG_STEREO_CONTROL_BASE_IDX 7448 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmOTG5_OTG_STEREO_CONTROL_BASE_IDX                                                             2
mmOTG5_OTG_STEREO_CONTROL_BASE_IDX 10113 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmOTG5_OTG_STEREO_CONTROL_BASE_IDX                                                             2
mmOTG5_OTG_STEREO_CONTROL_BASE_IDX 9083 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmOTG5_OTG_STEREO_CONTROL_BASE_IDX                                                             2