mmOTG5_OTG_CRC0_DATA_RG_BASE_IDX 7502 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmOTG5_OTG_CRC0_DATA_RG_BASE_IDX                                                               2
mmOTG5_OTG_CRC0_DATA_RG_BASE_IDX 10163 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmOTG5_OTG_CRC0_DATA_RG_BASE_IDX                                                               2
mmOTG5_OTG_CRC0_DATA_RG_BASE_IDX 9133 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmOTG5_OTG_CRC0_DATA_RG_BASE_IDX                                                               2