mmOTG4_OTG_CRC_SIG_BLUE_CONTROL_MASK_BASE_IDX 7310 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmOTG4_OTG_CRC_SIG_BLUE_CONTROL_MASK_BASE_IDX                                                  2
mmOTG4_OTG_CRC_SIG_BLUE_CONTROL_MASK_BASE_IDX 9975 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmOTG4_OTG_CRC_SIG_BLUE_CONTROL_MASK_BASE_IDX                                                  2
mmOTG4_OTG_CRC_SIG_BLUE_CONTROL_MASK_BASE_IDX 8945 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmOTG4_OTG_CRC_SIG_BLUE_CONTROL_MASK_BASE_IDX                                                  2