mmOTG3_OTG_VERTICAL_INTERRUPT1_CONTROL_BASE_IDX 7050 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmOTG3_OTG_VERTICAL_INTERRUPT1_CONTROL_BASE_IDX                                                2
mmOTG3_OTG_VERTICAL_INTERRUPT1_CONTROL_BASE_IDX 9717 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmOTG3_OTG_VERTICAL_INTERRUPT1_CONTROL_BASE_IDX                                                2
mmOTG3_OTG_VERTICAL_INTERRUPT1_CONTROL_BASE_IDX 8687 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmOTG3_OTG_VERTICAL_INTERRUPT1_CONTROL_BASE_IDX                                                2