mmOTG3_OTG_STATUS_HV_COUNT_BASE_IDX 7000 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmOTG3_OTG_STATUS_HV_COUNT_BASE_IDX                                                            2
mmOTG3_OTG_STATUS_HV_COUNT_BASE_IDX 9673 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmOTG3_OTG_STATUS_HV_COUNT_BASE_IDX                                                            2
mmOTG3_OTG_STATUS_HV_COUNT_BASE_IDX 8643 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmOTG3_OTG_STATUS_HV_COUNT_BASE_IDX                                                            2