mmOTG2_OTG_COUNT_RESET_BASE_IDX 6786 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmOTG2_OTG_COUNT_RESET_BASE_IDX                                                                2
mmOTG2_OTG_COUNT_RESET_BASE_IDX 9463 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmOTG2_OTG_COUNT_RESET_BASE_IDX                                                                2
mmOTG2_OTG_COUNT_RESET_BASE_IDX 8433 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmOTG2_OTG_COUNT_RESET_BASE_IDX                                                                2