mmOTG1_PHYPLL_PIXEL_RATE_CNTL_BASE_IDX  587 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmOTG1_PHYPLL_PIXEL_RATE_CNTL_BASE_IDX                                                         1
mmOTG1_PHYPLL_PIXEL_RATE_CNTL_BASE_IDX  225 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmOTG1_PHYPLL_PIXEL_RATE_CNTL_BASE_IDX                                                         1
mmOTG1_PHYPLL_PIXEL_RATE_CNTL_BASE_IDX  237 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmOTG1_PHYPLL_PIXEL_RATE_CNTL_BASE_IDX                                                         1