mmOTG1_OTG_GSL_VSYNC_GAP_BASE_IDX 6662 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmOTG1_OTG_GSL_VSYNC_GAP_BASE_IDX 2 mmOTG1_OTG_GSL_VSYNC_GAP_BASE_IDX 9339 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmOTG1_OTG_GSL_VSYNC_GAP_BASE_IDX 2 mmOTG1_OTG_GSL_VSYNC_GAP_BASE_IDX 8309 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmOTG1_OTG_GSL_VSYNC_GAP_BASE_IDX 2