BIF_CFG_DEV0_EPF0_VF5_1_COMMAND__INT_DIS_MASK 102259 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_2_3_sh_mask.h #define BIF_CFG_DEV0_EPF0_VF5_1_COMMAND__INT_DIS_MASK                                                         0x0400L
BIF_CFG_DEV0_EPF0_VF5_1_COMMAND__INT_DIS_MASK 30012 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_6_1_sh_mask.h #define BIF_CFG_DEV0_EPF0_VF5_1_COMMAND__INT_DIS_MASK                                                         0x0400L