mmOPP_PIPE_CRC5_OPP_PIPE_CRC_CONTROL_BASE_IDX 6160 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmOPP_PIPE_CRC5_OPP_PIPE_CRC_CONTROL_BASE_IDX                                                  2
mmOPP_PIPE_CRC5_OPP_PIPE_CRC_CONTROL_BASE_IDX 8765 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmOPP_PIPE_CRC5_OPP_PIPE_CRC_CONTROL_BASE_IDX                                                  2
mmOPP_PIPE_CRC5_OPP_PIPE_CRC_CONTROL_BASE_IDX 7735 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmOPP_PIPE_CRC5_OPP_PIPE_CRC_CONTROL_BASE_IDX                                                  2