mmOPP_PIPE1_OPP_PIPE_CONTROL_BASE_IDX 5922 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmOPP_PIPE1_OPP_PIPE_CONTROL_BASE_IDX                                                          2
mmOPP_PIPE1_OPP_PIPE_CONTROL_BASE_IDX 8431 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmOPP_PIPE1_OPP_PIPE_CONTROL_BASE_IDX                                                          2
mmOPP_PIPE1_OPP_PIPE_CONTROL_BASE_IDX 7401 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmOPP_PIPE1_OPP_PIPE_CONTROL_BASE_IDX                                                          2