mmODM5_OPTC_INPUT_SPARE_REGISTER_BASE_IDX 6268 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmODM5_OPTC_INPUT_SPARE_REGISTER_BASE_IDX                                                      2
mmODM5_OPTC_INPUT_SPARE_REGISTER_BASE_IDX 8957 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmODM5_OPTC_INPUT_SPARE_REGISTER_BASE_IDX                                                      2
mmODM5_OPTC_INPUT_SPARE_REGISTER_BASE_IDX 7927 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmODM5_OPTC_INPUT_SPARE_REGISTER_BASE_IDX                                                      2