mmMPC_PERFMON_EVENT_CTRL_BASE_IDX 5504 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmMPC_PERFMON_EVENT_CTRL_BASE_IDX                                                              2
mmMPC_PERFMON_EVENT_CTRL_BASE_IDX 6823 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmMPC_PERFMON_EVENT_CTRL_BASE_IDX                                                              2
mmMPC_PERFMON_EVENT_CTRL_BASE_IDX 5885 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmMPC_PERFMON_EVENT_CTRL_BASE_IDX                                                              2