mmMPC_CRC_SEL_CONTROL 5495 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmMPC_CRC_SEL_CONTROL                                                                          0x1726
mmMPC_CRC_SEL_CONTROL 6814 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmMPC_CRC_SEL_CONTROL                                                                          0x134c
mmMPC_CRC_SEL_CONTROL 5876 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmMPC_CRC_SEL_CONTROL                                                                          0x134c