mmMPCC_OGAM6_MPCC_OGAM_RAMA_END_CNTL1_G 7746 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmMPCC_OGAM6_MPCC_OGAM_RAMA_END_CNTL1_G                                                        0x1540
mmMPCC_OGAM6_MPCC_OGAM_RAMA_END_CNTL1_G 6768 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmMPCC_OGAM6_MPCC_OGAM_RAMA_END_CNTL1_G                                                        0x1540