mmMPCC_OGAM5_MPCC_OGAM_RAMA_END_CNTL2_G 7620 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmMPCC_OGAM5_MPCC_OGAM_RAMA_END_CNTL2_G                                                        0x1500
mmMPCC_OGAM5_MPCC_OGAM_RAMA_END_CNTL2_G 6642 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmMPCC_OGAM5_MPCC_OGAM_RAMA_END_CNTL2_G                                                        0x1500