mmMPCC_OGAM1_MPCC_OGAM_RAMA_END_CNTL1_R 7110 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmMPCC_OGAM1_MPCC_OGAM_RAMA_END_CNTL1_R                                                        0x13fd
mmMPCC_OGAM1_MPCC_OGAM_RAMA_END_CNTL1_R 6132 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmMPCC_OGAM1_MPCC_OGAM_RAMA_END_CNTL1_R                                                        0x13fd