mmMPCC_OGAM1_MPCC_OGAM_RAMA_END_CNTL1_G 7106 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmMPCC_OGAM1_MPCC_OGAM_RAMA_END_CNTL1_G                                                        0x13fb
mmMPCC_OGAM1_MPCC_OGAM_RAMA_END_CNTL1_G 6128 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmMPCC_OGAM1_MPCC_OGAM_RAMA_END_CNTL1_G                                                        0x13fb