mmMPCC_OGAM0_MPCC_OGAM_RAMA_END_CNTL1_G 6978 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmMPCC_OGAM0_MPCC_OGAM_RAMA_END_CNTL1_G                                                        0x13ba
mmMPCC_OGAM0_MPCC_OGAM_RAMA_END_CNTL1_G 6000 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmMPCC_OGAM0_MPCC_OGAM_RAMA_END_CNTL1_G                                                        0x13ba