mmMPCC7_MPCC_SM_CONTROL 6782 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmMPCC7_MPCC_SM_CONTROL                                                                        0x1332
mmMPCC7_MPCC_SM_CONTROL 5844 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmMPCC7_MPCC_SM_CONTROL                                                                        0x1332