mmMPCC5_MPCC_STALL_STATUS_BASE_IDX 6733 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmMPCC5_MPCC_STALL_STATUS_BASE_IDX                                                             2
mmMPCC5_MPCC_STALL_STATUS_BASE_IDX 5795 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmMPCC5_MPCC_STALL_STATUS_BASE_IDX                                                             2