mmMPCC5_MPCC_SM_CONTROL 6714 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmMPCC5_MPCC_SM_CONTROL                                                                        0x12fc
mmMPCC5_MPCC_SM_CONTROL 5776 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmMPCC5_MPCC_SM_CONTROL                                                                        0x12fc