mmMPCC5_MPCC_MEM_PWR_CTRL 6730 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmMPCC5_MPCC_MEM_PWR_CTRL                                                                      0x1304
mmMPCC5_MPCC_MEM_PWR_CTRL 5792 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmMPCC5_MPCC_MEM_PWR_CTRL                                                                      0x1304