mmMPCC4_MPCC_TOP_SEL 6672 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmMPCC4_MPCC_TOP_SEL                                                                           0x12dd
mmMPCC4_MPCC_TOP_SEL 5734 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmMPCC4_MPCC_TOP_SEL                                                                           0x12dd