mmMPCC4_MPCC_MEM_PWR_CTRL 6696 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmMPCC4_MPCC_MEM_PWR_CTRL                                                                      0x12e9
mmMPCC4_MPCC_MEM_PWR_CTRL 5758 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmMPCC4_MPCC_MEM_PWR_CTRL                                                                      0x12e9