mmMPCC3_MPCC_UPDATE_LOCK_SEL 5467 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmMPCC3_MPCC_UPDATE_LOCK_SEL                                                                   0x1686
mmMPCC3_MPCC_UPDATE_LOCK_SEL 6648 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmMPCC3_MPCC_UPDATE_LOCK_SEL                                                                   0x12c7
mmMPCC3_MPCC_UPDATE_LOCK_SEL 5710 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmMPCC3_MPCC_UPDATE_LOCK_SEL                                                                   0x12c7