mmMPCC3_MPCC_STATUS 5483 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmMPCC3_MPCC_STATUS                                                                            0x168e
mmMPCC3_MPCC_STATUS 6666 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmMPCC3_MPCC_STATUS                                                                            0x12d0
mmMPCC3_MPCC_STATUS 5728 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmMPCC3_MPCC_STATUS                                                                            0x12d0