mmMPCC3_MPCC_MEM_PWR_CTRL 6662 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmMPCC3_MPCC_MEM_PWR_CTRL                                                                      0x12ce
mmMPCC3_MPCC_MEM_PWR_CTRL 5724 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmMPCC3_MPCC_MEM_PWR_CTRL                                                                      0x12ce