mmMPCC3_MPCC_CONTROL 5463 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmMPCC3_MPCC_CONTROL                                                                           0x1684
mmMPCC3_MPCC_CONTROL 6644 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmMPCC3_MPCC_CONTROL                                                                           0x12c5
mmMPCC3_MPCC_CONTROL 5706 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmMPCC3_MPCC_CONTROL                                                                           0x12c5