mmMPCC3_MPCC_BG_G_Y_BASE_IDX 5478 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmMPCC3_MPCC_BG_G_Y_BASE_IDX                                                                   2
mmMPCC3_MPCC_BG_G_Y_BASE_IDX 6659 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmMPCC3_MPCC_BG_G_Y_BASE_IDX                                                                   2
mmMPCC3_MPCC_BG_G_Y_BASE_IDX 5721 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmMPCC3_MPCC_BG_G_Y_BASE_IDX                                                                   2