mmMPCC1_MPCC_UPDATE_LOCK_SEL 5403 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmMPCC1_MPCC_UPDATE_LOCK_SEL                                                                   0x1650
mmMPCC1_MPCC_UPDATE_LOCK_SEL 6580 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmMPCC1_MPCC_UPDATE_LOCK_SEL                                                                   0x1291
mmMPCC1_MPCC_UPDATE_LOCK_SEL 5642 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmMPCC1_MPCC_UPDATE_LOCK_SEL                                                                   0x1291