mmMPCC1_MPCC_STATUS 5419 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmMPCC1_MPCC_STATUS                                                                            0x1658
mmMPCC1_MPCC_STATUS 6598 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmMPCC1_MPCC_STATUS                                                                            0x129a
mmMPCC1_MPCC_STATUS 5660 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmMPCC1_MPCC_STATUS                                                                            0x129a