mmMPCC1_MPCC_OPP_ID_BASE_IDX 5398 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmMPCC1_MPCC_OPP_ID_BASE_IDX                                                                   2
mmMPCC1_MPCC_OPP_ID_BASE_IDX 6575 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmMPCC1_MPCC_OPP_ID_BASE_IDX                                                                   2
mmMPCC1_MPCC_OPP_ID_BASE_IDX 5637 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmMPCC1_MPCC_OPP_ID_BASE_IDX                                                                   2