mmMPCC1_MPCC_OPP_ID 5397 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h #define mmMPCC1_MPCC_OPP_ID                                                                            0x164d
mmMPCC1_MPCC_OPP_ID 6574 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h #define mmMPCC1_MPCC_OPP_ID                                                                            0x128e
mmMPCC1_MPCC_OPP_ID 5636 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h #define mmMPCC1_MPCC_OPP_ID                                                                            0x128e